A Parallel Coupled QVCO and Differential Injection-Locked Frequency Divider in 0.13 μm CMOS
A Parallel Coupled QVCO and Differential Injection-Locked Frequency Divider in 0.13 μm CMOS
박봉혁(한국전자통신연구원); 이광천(한국전자통신연구원)
10권 1호, 35~38쪽
초록
A fully integrated parallel-coupled 6-GHz quadrature voltage-controlled oscillator (QVCO) has been designed. The symmetrical parallel-coupled quadrature VCO is implemented using 0.13-μm CMOS process. The measured phase noise is —101.05 dBc/Hz at an offset frequency of 1 MHz. The tuning range of 710 MHz is achieved with a control voltage ranging from 0.3 to 1.4 V. The average output phase error is about 1.26° including cables and connectors. The QVCO dissipates 10 mA including buffer from the 1.5 V supply voltage. The output characteristic of the differential injection-locked frequency divider (DILFD), which has similar topology to the QVCO, is presented.
Abstract
A fully integrated parallel-coupled 6-GHz quadrature voltage-controlled oscillator (QVCO) has been designed. The symmetrical parallel-coupled quadrature VCO is implemented using 0.13-μm CMOS process. The measured phase noise is —101.05 dBc/Hz at an offset frequency of 1 MHz. The tuning range of 710 MHz is achieved with a control voltage ranging from 0.3 to 1.4 V. The average output phase error is about 1.26° including cables and connectors. The QVCO dissipates 10 mA including buffer from the 1.5 V supply voltage. The output characteristic of the differential injection-locked frequency divider (DILFD), which has similar topology to the QVCO, is presented.
- 발행기관:
- 한국전자파학회
- 분류:
- 전자/정보통신공학