제약공정변수를 통한 자원소요계획(Resource Planning)에 대한 연구: 반도체조립공정 S사 사례를 중심으로

The semiconductor assembly industry must be very crucial and necessary back-end process in terms of the supply chain for the semiconductor industry in order to produce the semiconductor products while its industry scale and revenue as well as its position amid holistic semiconductor industry is not much big. And as per the recent appearance of various IT application with the effect of the latest Mobile Internet, the latest IT product followed by end user's need should come to market on time and proper time with lowest cost driven policy. To cope with this kind of great business change, this thesis studied the simple, easy, convenient and convinced methodology to generate the resource plan through "Wire count" in wire bonding process, one of constraint process in terms of TOC(Theory Of Constraints) in semiconductor assembly process, which is the purpose to replace the traditional standard LHR/K (Labor Hour per K) based on IE(Industrial Engineering) UPH concept measured by stop watch. This hypothesis started that the simple resource plan by Wire count factor will have good correlation timely with sudden demand change and new product's ramp-up. And this background of thesis is to closely match with "Agile Manufacturing System". To verify statistical significance between the resource plan by LHR/K and Wire count factor, this thesis analyzed the past 3years production status for Global "S" company. And with Heuristic method through experimental, historical, expert data mining for past production results of "S" company, this thesis computed the resource plan such as the required equipment, manpower & space by both method and compared both results.