A Wide Output Range, High Power Efficiency Reconfigurable Charge Pump in 0.18 m BCD process
A Wide Output Range, High Power Efficiency Reconfigurable Charge Pump in 0.18 m BCD process
박형구(성균관대학교); 장정아(성균관대학교); 조성훈(성균관대학교); 이주리(성균관대학교); 김상윤(성균관대학교); Honey Durga Tiwari(성균관대학교); 부영건(성균관대학교); 황금철(성균관대학교); 양영구(성균관대학교); 이강윤(성균관대학교); 서문교(성균관대학교)
14권 6호, 777~788쪽
초록
This paper presents a wide output range, high power efficiency reconfigurable charge pump for driving touch panels with the high resistances. The charge pump is composed of 4-stages and its configuration automatically changes based on the required output voltage level. In order to keep the power efficiency over the wide output voltage range, internal blocks are automatically activated or deactivated by the clock driver in the reconfigurable charge pump minimizing the switching power loss due to the On and Off operations of MOSFET. In addition, the leakage current paths in each mode are blocked to compensate for the variation of power efficiency with respect to the wide output voltage range. This chip is fabricated using 0.18 m BCD process with high power MOSFET options, and the die area is 1870 m x 1430 m. The power consumption of the charge pump itself is 79.13 mW when the output power is 415.45 mW at the high voltage mode, while it is 20.097 mW when the output power is 89.903 mW at the low voltage mode. The measured maximum power efficiency is 84.01 %, when the output voltage is from 7.43 V to 12.23 V.
Abstract
This paper presents a wide output range, high power efficiency reconfigurable charge pump for driving touch panels with the high resistances. The charge pump is composed of 4-stages and its configuration automatically changes based on the required output voltage level. In order to keep the power efficiency over the wide output voltage range, internal blocks are automatically activated or deactivated by the clock driver in the reconfigurable charge pump minimizing the switching power loss due to the On and Off operations of MOSFET. In addition, the leakage current paths in each mode are blocked to compensate for the variation of power efficiency with respect to the wide output voltage range. This chip is fabricated using 0.18 m BCD process with high power MOSFET options, and the die area is 1870 m x 1430 m. The power consumption of the charge pump itself is 79.13 mW when the output power is 415.45 mW at the high voltage mode, while it is 20.097 mW when the output power is 89.903 mW at the low voltage mode. The measured maximum power efficiency is 84.01 %, when the output voltage is from 7.43 V to 12.23 V.
- 발행기관:
- 대한전자공학회
- 분류:
- 전기공학