실험계획법을 이용한 Reel Tape Packaging 공정조건 분석
Analysis of Reel Tape Packing process conditions using DOE
김재경(공주대학교); 나승준(공주대학교); 권준환(공주대학교); 전의식(공주대학교)
19권 2호, 105~109쪽
초록
Today’s placement machines can pick and place thousands of components per hour with a very high degree of accuracy. The packaged semiconductor chips are inserted into a carrier at regular intervals, covered with a tape to protect the chips from external impact, and supplied in a roll form. These packaging processes also progress rapidly in a consistent direction, affecting the peelback strength between the cover tape and carrier depending on the main process conditions. In this paper, we analyzed the main process variables that affect peelback strength in the reel tape packaging process for packaging semiconductor chips. The main effects and interactions were analyzed. The peelback strength range required in the packaging process was set as the nominal the best characteristics, and the optimum process condition satisfying this was derived.
Abstract
Today’s placement machines can pick and place thousands of components per hour with a very high degree of accuracy. The packaged semiconductor chips are inserted into a carrier at regular intervals, covered with a tape to protect the chips from external impact, and supplied in a roll form. These packaging processes also progress rapidly in a consistent direction, affecting the peelback strength between the cover tape and carrier depending on the main process conditions. In this paper, we analyzed the main process variables that affect peelback strength in the reel tape packaging process for packaging semiconductor chips. The main effects and interactions were analyzed. The peelback strength range required in the packaging process was set as the nominal the best characteristics, and the optimum process condition satisfying this was derived.
- 발행기관:
- 한국반도체디스플레이기술학회
- 분류:
- 반도체공정